Inova presents »APXpress«
Up to 32 Gb/s with scalable high-speed architecture
INOVA develops »APXpress« the next generation of high-speed communication for the automotive sector – with link speeds of up to 32 Gb/s.
»APXpress« provides a configurable network with a variable number of nodes that can be assembled according to the application and required interfaces. A node in the »APXpress« network consists of a high-speed SerDes (PHY) interface and a silicon process-independent IP core. After the functionality of the protocol has been successfully demonstrated several times using FPGA (e.g. demo of redundant transmission of camera data at Electronica 2024), the first test chip of the »APXpress« SerDes is now available in the lab.
The evaluation of functionality and performance in the lab is proceeding as planned, with all key functions such as VCO, PLL, the entire digital signal processing, and echo cancellation already successfully verified. Enabled by achieving this first milestone the second iteration tapeout already happened October 6. The goal of this second tapeout is, among other things, to connect the test chip to an FPGA and thus perform extended functional tests and a proof of concepts in Q1/2026. While the first two test chips still have many debug interfaces, the third device will only have essential debug modalities and the final IP data interface. The third device will be a standalone, fully functional product that, after successful verification, can also be used directly in »APXpress« networks starting in Q2/2026.
»APXpress« PHY was primarily designed for automotive communication applications and optimized for energy efficiency and transmission speed, but it also forms the starting point for the development of additional PHYs for standard interfaces such as DisplayPort, PCIe, or CSI D-PHY.
»APXpress« provides bandwidths of up to 32 Gb/s via either symmetrical transmission with dual simplex over two differential lines or asymmetrical transmission via full duplex over one differential line, using echo cancellation. Both the high throughput and the decision to implement an NRZ-encoded signal ensure that »APXpress« can support optical transmissions. Not only are the bandwidths of individual lanes scalable (4, 8, 16, or 32 Gb/s) moreover the number of lanes can also be adjusted depending on the application. The complete digital signal processing path of the »APXpress« PHY (22nm FDX) was implemented in hardware without the need for additional software. This has a remarkable positive impact on the speed and energy consumption of all future »APXpress« devices.
With the first »APXpress« test chip, INOVA has reached a decisive milestone toward a robust, future-oriented, and high-performance communication system, thereby strengthening its role as a technology leader for the next generation of automotive data backbone.